REST - Representational State Transfer

Today's post is a little different. I read a little about the REST architecture and found it fascinating. I hope you do too, after reading this. 
REST is an architectural style that makes up the web. 
HTTP is mainly a pointer that can track any resource in the world. It has versatility, but till today we use it only for browsing web pages. In fact, we can’t really think of any other uses of it. But it was built to have far more applications than its given credit for. Basically, HTTP, rather the entire web today focuses its application on human interaction with the machine; what we fail to learn is that HTTPs are much more flexible than that, i.e. applications can be made using HTTP for machine interaction as well. The webpage as we know it is mainly a representation of several relevant resources put together (like an image, videos). This is understandable by humans, not by computers. So, computers really don’t know what useful information they have brought to you. All they do is go get it for you. Imagine machines doing stuff like that for each other and generating very useful info smartly without human interaction. HTTP is capable of creating another representation (like the webpage) that is understandable by the computer too. Sort of like a binary representation of the data that you’re fetching. That way, the system too understands what data is given, and can communicate to other systems using the data and its binary representation. This kind of access, when given to a machine, can provide great results if a smartness is programmed in machines to learn the information they just fetched and try to understand the priority &/or requirement of the human accessing request and get far better results than what exists.

Credits: www.ibm.com

Let me try and give an example : Suppose you want a cheap gadget, say a smartphone. Now, you talk to the people you know and among them, none have the phone available for that budget. But, a well-wisher recommends you to some other person who he thinks will have the phone available for your budget. Now, machines can't do that because they have no idea what resources they've picked up from world wide web, since they're not in machine understandable formats, but human understandable formats. But, it'd be excellent if machines had such intelligence. Say machine X is requesting some resource from a server, say, machine Y. Now, machine Y has no such resources but given that it collects such immense data (assume it can understand it), then Y can definitely be given intelligence to tell machine X that it doesn't have the resource available but X's request maybe processed by some other server, machine Z. This will definitely enable machines to have human-like intelligence and that can get work done a lot faster and more efficiently.

For more info you can check out the wiki page : 
https://en.wikipedia.org/wiki/Representational_state_transfer

Finally Understanding VLSI - The Four Categories

Today's post is a continuation of the previous post, "About the N-MOSFET" which was about the simple N-MOSFET. If you haven't already checked it out, I highly recommend that you do.

This post is the "First thing's first" type of post so let's start with the 4 basic categories or levels of abstraction into which the vast VLSI field maybe divided.
1.Physical level/Transistor level.
2.Circuits level.
3.Sub-systems level/ Architectural level.
4.Systems level.

In the first category, one learns about all the physical properties of a MOSFET, like what should the physical parameters be, in order to change its electrical parameters. Alongside, (s)he also learns the 4 basic terminals of a MOSFET - Source, Gate, Drain and Bulk. Generally, the bulk terminal isn't considered in initial stages of learning designing concepts. But it comes into picture when one designs advanced circuits.  Knowledge of this is a must, and frankly it's a little complex and boring to understand, but it's not a lengthy concept. I'll write another post just on this topic later.

In the Circuits level one first learns how to create the basic gates and then put them together to make simple circuits which can perform simple functions. I'll write about the basic gates (NOT, AND & OR) in the upcoming post. This can be considered analogous to functions in programming, where small functions with minor problem definitions can be created so they can be put together to create a solution for the major problem definition. In this level, one also learns how to design layouts for the circuit developed, using the standard rules of layout design, which is a vast field. Examples for this level maybe CMOS subcircuits, and CMOS amplifiers.

Architecture level deals with the sub-major problem-definition solutions. Here, the circuits developed in the previous levels are put together to make a valid architecture for the sub-solution. Examples maybe CMOS Op-Amp, High level amplifiers, comparators etc. These are put together in the next level in form of a block diagram to create working systems.

The Systems level is similar to designing a block diagram where each block represents the sub-system circuitry. The designer of this level need not know what happens at the electrons level in the transistor. (S)he is just concerned in placing all blocks together so that they work efficiently &/or economically as one whole system. The examples in this level maybe industrially available Analog to Digital converters (ADCs) or Digital to Analog Converters (DACs).

After learning all the four concepts, one has to decide which field interests him/her the most and go ahead in that field. Generally, people recommend that one gains exposure in all of the fields for complete growth in knowledge of VLSI. Also, people usually get started with the verification of developed systems and go on towards R&D in either of the four categories.

I'll come up with another post which can elaborate on real time examples of these 4 levels so the reader finds it easy to understand and gets motivated to learn theory regarding it. Of course, the post will come up after I have elaborately explained the above levels of abstraction.

Finally Understanding VLSI : About the MOSFET

Today’s post is about the basics of VLSI. VLSI is the acronym of Very Large Scale Integration. In a VLSI chip, the number of transistors that are integrated ranges from 20,000-100,000. The type of transistors used is varied based on application. In this post and a couple of following posts, I will be writing about NMOS transistors and extending it to CMOS. Today, GaAs transistors are being used as they also have lower power consumption and are fast at the same time. Also, their design is on similar lines as that of NMOS. So basically, once you’re thorough with design of NMOS, everything else is pretty much just an extension.

Understanding the working of a MOS transistor is very important to understand VLSI, so I will begin with MOS. MOS is short for Metal Oxide Semiconductor. As the name suggests, these transistors are, in general sense a combination of metal and silicon oxide. (Today, polysilicon is used instead of the metal, but the name still remains MOS) Most importantly, these are Field Effect Transistors (FETs), which means, they work based on the variations of the voltage supplied to them and not on the variations of current supplied to them. This difference has to be understood because that’s what differentiates BJTs (which are now obsolete) and FETs.  

Basically any FET contains three terminals, Drain, Gate and Source(4th also exists, called the bulk terminal. To put it simply though, 3 terminals maybe studied). The output current is produced between source and drain, with the voltage supplied to the gate. (This sentence may be hard to follow for laymen, but just go with me on this one; explanation is on its way) When I say output flows between source & drain, it means that there’s a path for it flow and that path is called the “channel”. 

Based on whether the channel is present or absent when the transistor is idle, a MOS transistor is classified as:

1. Depletion-MOS (DMOS): Where the channel is present when the MOS is idle.

2. Enhancement-MOS (EMOS): Where the channel is absent when the MOS is idle. 

These classifications basically give an idea if the transistor is ON or OFF, when idle (i.e. when there is no voltage input on the gate terminal). So, since a channel exists on the DMOS, this transistor is ON even when there is no voltage at the gate. And the EMOS is OFF, when there is no voltage supplied at the gate. Each of them has separate applications.

The first image is the basic MOS symbol and the second one is cross sectional view of an n-channel MOSFET. Commonly, the EMOSFET is used in the construction of CMOS.

credits: www.elprocus.com

The Depletion MOSFET:

This transistor conducts even when gate-source voltage is zero (i.e. Vgs = 0). Consider a positive voltage across drain-source (i.e. Vds =0). Then, positive voltage at the drain attracts electrons in the channel. This motion of electrons cause the drain current Ids. Hence, the depletion MOSFET conducts at zero gate-source voltage. 

Generally, there is a particular threshold gate-source voltage above which only, a MOSFET begins to conduct. In case of n channel DMOS this voltage is negative (because the transistor conducts even at zero gate-source voltage).  

The Enhancement MOSFET:

I will explain this in detail. Here, we need an above-zero threshold voltage for the transistor to conduct (because the channel needs to be established, it is not present by default like in DMOS). 

There are three cases in the working of these devices:

1. Vgs>Vt but Vds=0 (Cutoff region): Here, the voltage at the gate is positive with respect to the source. So, the holes (substrate is p-type) start to repel from the region right below the gate. This means that the particular region is depleted of holes. Now if the Vgs is sufficiently large, it starts to attract electrons towards the region which is now depleted of holes. This establishes the n-channel (which is also called inversion region) and the depletion region is pushed below that region.

2. Vgs > Vt and Vds=0 but Vg>Vd (Linear region): The channel is established and now, electrons begin to flow from source to drain due to positive Vds. At the source end, Vg is the controlling voltage, but at the drain end, Vg-Vd is the controlling voltage. This particular condition is called the linear condition where, the current is dependent on both Vgs and Vds. The channel is resistive. 

3. Vgs > Vt but Vg<Vd (Saturation Region): In this case, the effective voltage at drain becomes less than the threshold voltage required for the channel to be established and that’s why the channel is pinched off before it reaches the drain. Now, the channel becomes highly resistive; but since the drain voltage is high, it still attracts the electrons. So the electrons continue to conduct (from drift mechanism) and they jump to the depletion region and get accelerated towards the drain. This particular condition is called saturation condition. So, now the channel current is almost fully independent of the drain voltage and is dependent only on the Vgs. So the transistor in this condition can act as a stable current source.

In the first condition we see the important difference between a BJT and FET. i.e. in the pn junction of BJT, electrons are introduced because of donor atoms, but in FET, electrons are introduced due to the gate voltage. Hence, an FET acts as a voltage controlled device; controlling voltage is the gate-source voltage.

I have written only about the n-channel MOSFET, but the p-channel MOSFET is its dual. Hence, to conduct, a p-channel MOS needs negative gate-source voltage. Every other mechanism remains the same. Also, mobility of holes is lower than that of electrons. 

Here are some links to further explanation and videos: 

http://www.electronics-tutorials.ws/transistor/tran_6.html

http://www.youtube.com/watch?v=tz62t-q_KEc

http://www.youtube.com/watch?v=QO5FgM7MLGg